bring back tlb shootdown code

39b1cf6b · Nickolai Zeldovich · 41fc9e5e · 39b1cf6b · 39b1cf6b · 39b1cf6b
--- a/defs.h
+++ b/defs.h
@@ -79,6 +79,7 @@ int             cpunum(void);
 extern volatile uint*    lapic;
 void            lapiceoi(void);
 void            lapicinit(int);
+void            lapic_tlbflush(uint);
 void            lapicstartap(uchar, uint);
 void            microdelay(int);


--- a/lapic.c
+++ b/lapic.c
@@ -47,6 +47,27 @@ lapicw(int index, int value)
  lapic[ID];  // wait for write to finish, by reading
 }

+static uint
+lapicr(uint off)
+{
+  return lapic[off];
+}
+
+static int
+apic_icr_wait()
+{
+  uint i = 100000;
+  while ((lapicr(ICRLO) & BUSY) != 0) {
+    nop_pause();
+    i--;
+    if (i == 0) {
+      cprintf("apic_icr_wait: wedged?\n");
+      return -1;
+    }
+  }
+  return 0;
+}
+
 //PAGEBREAK!
 void
 lapicinit(int c)
@@ -130,6 +151,22 @@ microdelay(int us)
 {
 }

+// Send IPI
+void
+lapic_ipi(int cpu, int ino)
+{
+  lapicw(ICRHI, cpu << 24);
+  lapicw(ICRLO, FIXED | DEASSERT | ino);
+  if (apic_icr_wait() < 0)
+    panic("lapic_ipi: icr_wait failure");
+}
+
+void
+lapic_tlbflush(uint cpu)
+{
+  lapic_ipi(cpu, T_TLBFLUSH);
+}
+
 #define IO_RTC  0x70

 // Start additional processor running bootstrap code at addr.

--- a/sysproc.c
+++ b/sysproc.c
@@ -134,7 +134,12 @@ sys_unmap(void)
  clearpages(proc->pgdir,
 	     (void*) (PGROUNDDOWN(addr)),
 	     (void*) (PGROUNDDOWN(addr)+PGROUNDUP(len)));
+  cli();
  lcr3(PADDR(proc->pgdir));
+  for (uint i = 0; i < ncpu; i++)
+    if (i != cpu->id)
+      lapic_tlbflush(i);
+  sti();
  return 0;
 }


--- a/trap.c
+++ b/trap.c
@@ -79,6 +79,9 @@ trap(struct trapframe *tf)
    cprintf("cpu%d: spurious interrupt at %x:%x\n",
            cpu->id, tf->cs, tf->eip);
    lapiceoi();
+  case T_TLBFLUSH:
+    lapiceoi();
+    lcr3(rcr3());
    break;
   
  //PAGEBREAK: 13

--- a/traps.h
+++ b/traps.h
@@ -25,6 +25,7 @@
 // These are arbitrarily chosen, but with care not to overlap
 // processor defined exceptions or interrupt vectors.
 #define T_SYSCALL       64      // system call
+#define T_TLBFLUSH      65      // flush TLB
 #define T_DEFAULT      500      // catchall

 #define T_IRQ0          32      // IRQ 0 corresponds to int T_IRQ

--- a/x86.h
+++ b/x86.h
@@ -138,6 +138,12 @@ xchg(volatile uint *addr, uint newval)
  return result;
 }

+static inline void
+nop_pause(void)
+{
+  __asm volatile("pause" : :);
+}
+
 //PAGEBREAK!
 static inline void
 lcr0(uint val)