Make hwid_t a struct to help catch errors

acd87eba · Silas Boyd-Wickizer · 44725ca6 · acd87eba · acd87eba · acd87eba
--- a/include/kernel.hh
+++ b/include/kernel.hh
@@ -140,10 +140,10 @@ void            kbdintr(void);
 // lapic.c
 hwid_t          lapicid(void);
-void            lapicstartap(u8, u32 addr);
+void            lapicstartap(hwid, u32 addr);
 void            lapiceoi(void);
-void            lapic_tlbflush(u32);
+void            lapic_tlbflush(hwid);
-void            lapic_sampconf(u32);
+void            lapic_sampconf(hwid);
 void            lapicpc(char mask);
 // mp.c

--- a/include/mmu.h
+++ b/include/mmu.h
@@ -119,6 +119,12 @@ struct taskstate
  u16 iomba;
  u8 iopb[0];
 } __attribute__ ((packed, aligned(16)));
+typedef struct hwid { 
+  u8 num;
+} hwid_t;
+#define HWID(xnum) (struct hwid){ num: (u8)(xnum) }
 #endif
 #define INT_P      (1<<7)      /* interrupt descriptor present */

--- a/include/types.h
+++ b/include/types.h
+#pragma once
 typedef unsigned char   u8;
 typedef char            s8;
 typedef unsigned short  u16;
@@ -16,8 +18,8 @@ typedef uptr            paddr;
 // Page Map Entry (refers to any entry in any level)
 typedef u64             pme_t;
+// Logical CPU ID type
 typedef u8              cpuid_t;
-typedef u8              hwid_t;
 #ifdef XV6
 // POSIX types

--- a/kernel/hwvm.cc
+++ b/kernel/hwvm.cc
@@ -213,7 +213,7 @@ inittls(void)
  cpuid_t id = -1;
  for (id = 0; id < NCPU; id++)
-    if (cpus[id].hwid == lapicid())
+    if (cpus[id].hwid.num == lapicid().num)
      break;
  assert(id != -1);
@@ -246,7 +246,7 @@ tlbflush(u64 myreq)
  for (int i = 0; i < ncpu; i++)
    if (cpus[i].tlbflush_done < myreq)
-      lapic_tlbflush(i);
+      lapic_tlbflush(cpus[i].hwid);
  for (int i = 0; i < ncpu; i++)
    while (cpus[i].tlbflush_done < myreq)

--- a/kernel/lapic.cc
+++ b/kernel/lapic.cc
@@ -140,17 +140,16 @@ lapicpc(char mask)
 hwid_t
 lapicid(void)
 {
-  // Cannot call cpu when interrupts are enabled:
+  if (readrflags() & FL_IF) {
-  // result not guaranteed to last long enough to be used!
-  if(readrflags()&FL_IF){
    cli();
    panic("cpunum() called from %p with interrupts enabled\n",
      __builtin_return_address(0));
  }
-  if(lapic)
+  if (lapic == nullptr)
-    return lapic[ID]>>24;
+    panic("lapicid");
-  return 0;
+  return HWID(lapic[ID]>>24);
 }
 // Acknowledge interrupt.
@@ -163,30 +162,30 @@ lapiceoi(void)
 // Send IPI
 void
-lapic_ipi(int cpu, int ino)
+lapic_ipi(hwid_t hwid, int ino)
 {
-  lapicw(ICRHI, cpu << 24);
+  lapicw(ICRHI, hwid.num << 24);
  lapicw(ICRLO, FIXED | DEASSERT | ino);
  if (lapicwait() < 0)
    panic("lapic_ipi: lapicwait failure");
 }
 void
-lapic_tlbflush(u32 cpu)
+lapic_tlbflush(hwid_t hwid)
 {
-  lapic_ipi(cpu, T_TLBFLUSH);
+  lapic_ipi(hwid, T_TLBFLUSH);
 }
 void
-lapic_sampconf(u32 cpu)
+lapic_sampconf(hwid_t hwid)
 {
-  lapic_ipi(cpu, T_SAMPCONF);
+  lapic_ipi(hwid, T_SAMPCONF);
 }
 // Start additional processor running bootstrap code at addr.
 // See Appendix B of MultiProcessor Specification.
 void
-lapicstartap(u8 apicid, u32 addr)
+lapicstartap(hwid hwid, u32 addr)
 {
  int i;
  volatile u16 *wrv;
@@ -202,11 +201,11 @@ lapicstartap(u8 apicid, u32 addr)
  // "Universal startup algorithm."
  // Send INIT (level-triggered) interrupt to reset other CPU.
-  lapicw(ICRHI, apicid<<24);
+  lapicw(ICRHI, hwid.num<<24);
-  lapicw(ICRLO, apicid | INIT | LEVEL | ASSERT);
+  lapicw(ICRLO, hwid.num | INIT | LEVEL | ASSERT);
  lapicwait();
  microdelay(10000);
-  lapicw(ICRLO, apicid |INIT | LEVEL);
+  lapicw(ICRLO, hwid.num |INIT | LEVEL);
  lapicwait();
  microdelay(10000);    // should be 10ms, but too slow in Bochs!
@@ -216,7 +215,7 @@ lapicstartap(u8 apicid, u32 addr)
  // should be ignored, but it is part of the official Intel algorithm.
  // Bochs complains about the second one.  Too bad for Bochs.
  for(i = 0; i < 2; i++){
-    lapicw(ICRHI, apicid<<24);
+    lapicw(ICRHI, hwid.num<<24);
    lapicw(ICRLO, STARTUP | (addr>>12));
    microdelay(200);
  }

--- a/kernel/main.cc
+++ b/kernel/main.cc
@@ -81,7 +81,7 @@ bootothers(void)
    *(u64*)(code-12) = (u64)stack + KSTACKSIZE;
    bstate = 0;
-    lapicstartap(c->id, v2p(code));
+    lapicstartap(c->hwid, v2p(code));
    // Wait for cpu to finish mpmain()
    while(bstate == 0)
      ;

--- a/kernel/mp.cc
+++ b/kernel/mp.cc
@@ -113,14 +113,10 @@ initmp(void)
      proc = (struct mpproc*)p;
      if (ncpu == NCPU)
        panic("initmp: too many CPUs");
-      if(ncpu != proc->apicid){
-        cprintf("mpinit: ncpu=%d apicid=%d\n", ncpu, proc->apicid);
-        //ismp = 0;
-      }
      if(proc->flags & MPBOOT)
        bcpu = &cpus[ncpu];
      cpus[ncpu].id = ncpu;
-      cpus[ncpu].hwid = proc->apicid;
+      cpus[ncpu].hwid = HWID(proc->apicid);
      ncpu++;
      p += sizeof(struct mpproc);
      continue;

--- a/kernel/sampler.cc
+++ b/kernel/sampler.cc
@@ -85,7 +85,7 @@ sampstart(void)
  for(struct cpu *c = cpus; c < cpus+ncpu; c++) {
    if(c == cpus+mycpu()->id)
      continue;
-    lapic_sampconf(c->id);
+    lapic_sampconf(c->hwid);
  }
  sampconf();
  popcli();