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提交 eadbd55a 创建 作者: rsc's avatar rsc
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oops - wrong bit (vic zandy)

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ioapic.c
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...@@ -17,7 +17,7 @@ ...@@ -17,7 +17,7 @@
// The first (low) register in a pair contains configuration bits. // The first (low) register in a pair contains configuration bits.
// The second (high) register contains a bitmask telling which // The second (high) register contains a bitmask telling which
// CPUs can serve that interrupt. // CPUs can serve that interrupt.
#define INT_DISABLED 0x00100000 // Interrupt disabled #define INT_DISABLED 0x00010000 // Interrupt disabled
#define INT_LEVEL 0x00008000 // Level-triggered (vs edge-) #define INT_LEVEL 0x00008000 // Level-triggered (vs edge-)
#define INT_ACTIVELOW 0x00002000 // Active low (vs high) #define INT_ACTIVELOW 0x00002000 // Active low (vs high)
#define INT_LOGICAL 0x00000800 // Destination is CPU id (vs APIC ID) #define INT_LOGICAL 0x00000800 // Destination is CPU id (vs APIC ID)
......
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