comments; rename irq_ to pic_

eb52c7de · rsc · 5516be1f · eb52c7de · eb52c7de · eb52c7de
--- a/console.c
+++ b/console.c
+// Console input and output.
+// Input is from the keyboard only.
+// Output is written to the screen and the printer port.
+
 #include "types.h"
 #include "defs.h"
 #include "param.h"
@@ -278,7 +282,7 @@ console_init(void)
  devsw[CONSOLE].read = console_read;
  //use_console_lock = 1;

-  irq_enable(IRQ_KBD);
+  pic_enable(IRQ_KBD);
  ioapic_enable(IRQ_KBD, 0);
 }


--- a/defs.h
+++ b/defs.h
@@ -85,7 +85,7 @@ void            mp_init(void);
 void            mp_startthem(void);

 // picirq.c
-void            irq_enable(int);
+void            pic_enable(int);
 void            pic_init(void);

 // pipe.c

--- a/ide.c
+++ b/ide.c
@@ -47,7 +47,7 @@ ide_init(void)
  int i;

  initlock(&ide_lock, "ide");
-  irq_enable(IRQ_IDE);
+  pic_enable(IRQ_IDE);
  ioapic_enable(IRQ_IDE, ncpu - 1);
  ide_wait_ready(0);
  

--- a/init.c
+++ b/init.c
+// init: The initial user-level program
+
 #include "types.h"
 #include "stat.h"
 #include "user.h"
 #include "fcntl.h"

-// init: The initial user-level program
-
 char *sh_args[] = { "sh", 0 };

 int

--- a/ioapic.c
+++ b/ioapic.c
 // The I/O APIC manages hardware interrupts for an SMP system.
 // http://www.intel.com/design/chipsets/datashts/29056601.pdf
+// See also picirq.c.

 #include "types.h"
 #include "defs.h"

--- a/kbd.c
+++ b/kbd.c
@@ -48,4 +48,3 @@ kbd_intr(void)
 {
  console_intr(kbd_getc);
 }
-
--- a/mp.c
+++ b/mp.c
+// Multiprocessor bootstrap.
+// Search memory for MP description structures.
 // http://developer.intel.com/design/pentium/datashts/24201606.pdf

 #include "types.h"

--- a/picirq.c
+++ b/picirq.c
+// Intel 8259A programmable interrupt controllers.
+
 #include "types.h"
 #include "x86.h"
 #include "traps.h"

-// I/O Addresses of the two 8259A programmable interrupt controllers
+// I/O Addresses of the two programmable interrupt controllers
 #define IO_PIC1         0x20    // Master (IRQs 0-7)
 #define IO_PIC2         0xA0    // Slave (IRQs 8-15)

@@ -10,21 +12,20 @@

 // Current IRQ mask.
 // Initial IRQ mask has interrupt 2 enabled (for slave 8259A).
-static ushort irq_mask_8259A = 0xFFFF & ~(1<<IRQ_SLAVE);
+static ushort irqmask = 0xFFFF & ~(1<<IRQ_SLAVE);

 static void
-irq_setmask_8259A(ushort mask)
+pic_setmask(ushort mask)
 {
-  irq_mask_8259A = mask;
-
-  outb(IO_PIC1+1, (char)mask);
-  outb(IO_PIC2+1, (char)(mask >> 8));
+  irqmask = mask;
+  outb(IO_PIC1+1, mask);
+  outb(IO_PIC2+1, mask >> 8);
 }

 void
-irq_enable(int irq)
+pic_enable(int irq)
 {
-  irq_setmask_8259A(irq_mask_8259A & ~(1<<irq));
+  pic_setmask(irqmask & ~(1<<irq));
 }

 // Initialize the 8259A interrupt controllers.
@@ -78,6 +79,6 @@ pic_init(void)
  outb(IO_PIC2, 0x68);             // OCW3
  outb(IO_PIC2, 0x0a);             // OCW3

-  if(irq_mask_8259A != 0xFFFF)
-    irq_setmask_8259A(irq_mask_8259A);
+  if(irqmask != 0xFFFF)
+    pic_setmask(irqmask);
 }
--- a/timer.c
+++ b/timer.c
@@ -28,5 +28,5 @@ timer_init(void)
  outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
  outb(IO_TIMER1, TIMER_DIV(100) % 256);
  outb(IO_TIMER1, TIMER_DIV(100) / 256);
-  irq_enable(IRQ_TIMER);
+  pic_enable(IRQ_TIMER);
 }