提交 f964a990 创建 作者: Silas Boyd-Wickizer's avatar Silas Boyd-Wickizer

Drop KBASE to 0xFFFFFF0000000000.

This requires switching from -mcmodel=kernel to -mcmodel=large. The performance hit appears to be small.
上级 983e1bc4
......@@ -20,7 +20,7 @@ NM = $(TOOLPREFIX)nm
OBJCOPY = $(TOOLPREFIX)objcopy
CFLAGS = -fno-pic -static -fno-builtin -fno-strict-aliasing -O2 -Wall -MD -ggdb \
-m64 -Werror -std=c99 -fms-extensions -mno-sse -mcmodel=kernel -I$(QEMUSRC) \
-m64 -Werror -std=c99 -fms-extensions -mno-sse -mcmodel=large -I$(QEMUSRC) \
-fno-omit-frame-pointer -DHW_$(HW) -include param.h
CFLAGS += $(shell $(CC) -fno-stack-protector -E -x c /dev/null >/dev/null 2>&1 && echo -fno-stack-protector)
ASFLAGS = -m64 -gdwarf-2
......
......@@ -9,8 +9,8 @@
# The linker loads the executable as if starting at KBASE+2MB, but we
# ask the loader to load the kernel at physical 2MB and then set up the
# necessary memory mapping to switch to the higher address.
# The value of KBASE must match the definitions in vmx.h and kernel.ld.
#define KBASE 0xFFFFFFFF80000000 /* -2GB */
# The value of KBASE must match the definitions in kernel.h and kernel.ld.
#define KBASE 0xFFFFFF0000000000
# PADDR(x) is the physical memory address corresponding to x.
# Until we set up the memory map, fairly late in this file, we have to
......@@ -102,7 +102,7 @@ start64:
.code32
.globl apstart
apstart:
call loadgdt
call loadgdt
ljmp $KCSEG32, $PADDR(apstart32) // code32 segment selector
apstart32:
......@@ -126,7 +126,8 @@ tramp64:
# running at PADDR(tramp64), so use an explicit calculation to
# load and jump to the correct address. %rdi should hold the
# physical address of the jmp target.
addq $KBASE, %rdi
movq $KBASE, %r11
addq %r11, %rdi
jmp *%rdi
# Initial stack
......@@ -144,20 +145,19 @@ tramp64:
.global kpml4
kpml4:
.quad PADDR(pdpt0) + (1<<0) + (1<<1) // present, read/write
.space 4096 - 16
.quad 0
.space 4096 - 2*16
.quad PADDR(pdpt1) + (1<<0) + (1<<1) // present, read/write
.quad 0
.align 4096
pdpt0:
.quad PADDR(pdt) + (1<<0) + (1<<1) // present, read/write
.quad 0
.space 4096 - 16
.space 4096 - 8
.align 4096
pdpt1:
.space 4096 - 16
.quad PADDR(pdt) + (1<<0) + (1<<1) // present, read/write
.quad 0
.space 4096 - 8
.align 4096
pdt:
......
......@@ -107,8 +107,8 @@ pgmap(void *va, void *last, paddr pa)
void
initpg(char* (*alloc)(void))
{
// Map first 4GB to PBASE
pgmap((void *) PBASE, (void *) (PBASE+(1UL<<32)), 0);
// Map first 4GB to KBASE
pgmap((void *) (KBASE+(1UL<<30)), (void *) (KBASE+(1UL<<32)), (1UL<<30));
// boot.S maps first 1GB to KBASE and gets us running with kpml4
}
......@@ -121,7 +121,7 @@ setupkvm(void)
if((pml4 = (pml4e_t*)kalloc()) == 0)
return 0;
k = PX(3, PBASE);
k = PX(3, KBASE);
memset(&pml4[0], 0, 8*k);
memmove(&pml4[k], &kpml4[k], 8*(512-k));
return pml4;
......@@ -180,7 +180,7 @@ freevm(pml4e_t *pml4)
panic("freevm: no pgdir");
// Don't free kernel portion of the pml4
k = PX(3, PBASE);
k = PX(3, KBASE);
for (i = 0; i < k; i++) {
if (pml4[i] & PTE_P) {
freepm(p2v(PTE_ADDR(pml4[i])), 2);
......
......@@ -6,7 +6,7 @@
#include "traps.h"
#include "kernel.h"
#define IOAPIC (PBASE + 0xFEC00000) // Default physical address of IO APIC
#define IOAPIC (KBASE + 0xFEC00000) // Default physical address of IO APIC
#define REG_ID 0x00 // Register index: ID
#define REG_VER 0x01 // Register index: version
......
#include "mmu.h"
#define KBASE 0xFFFFFFFF80000000ull
#define PBASE 0xFFFFFF0000000000ull
#define KBASE 0xFFFFFF0000000000ull
// XXX(sbw) arbitrary for right now..
#define USERTOP 0x0000000040000000ull
......
......@@ -4,7 +4,7 @@ ENTRY(xxx)
SECTIONS
{
. = 0xFFFFFFFF80100000;
. = 0xFFFFFF0000100000;
PROVIDE(text = .);
.text : AT(0x100000) {
*(.text .stub .text.* .gnu.linkonce.t.*)
......
......@@ -42,7 +42,7 @@
#define IO_RTC 0x70
static volatile u32 *lapic = (u32 *)(PBASE + 0xfee00000);
static volatile u32 *lapic = (u32 *)(KBASE + 0xfee00000);
static u64 lapichz;
static void
......
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