Initial commit

fdda38a1 · 赵鹏翀 · fdda38a1 · fdda38a1 · 0646239b · fdda38a1
--- a/.gitignore
+++ b/.gitignore
+*.cir
+*.xml
+*.bak
+/.vs
\ No newline at end of file
--- a/.gitmodules
+++ b/.gitmodules
+[submodule "8086"]
+	path = 8086
+	url = https://zpc@www.codecode.net/engintime/Dream-Logic/Intel-classic-chips/8086.git
--- a/8086 @ 0646239b
+++ b/8086 @ 0646239b
+Subproject commit 0646239b4d1645f6a0da63d7f4bb3142942e567c
--- a/IO/IO.dlsche
+++ b/IO/IO.dlsche
--- a/IO/IO.dlsche.svg
+++ b/IO/IO.dlsche.svg
--- a/Lab001.dlproj
+++ b/Lab001.dlproj
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<project id="1ecf62fe-a487-4aa8-9e81-5499c06fdab7" name="Lab001" version="1">
+
+  <files>
+    <filefolder id="c6367782-0a28-4c98-a5fe-d7ab4a483733" name="MEM">
+      <file relativepath="MEM\MEM.dlsche"/>
+      <file relativepath="MEM\ram.dlsche"/>
+      <file relativepath="MEM\ram.asm"/>
+      <file relativepath="MEM\ram.rxm"/>
+      <file relativepath="MEM\ram.bat"/>
+    </filefolder>
+    <filefolder id="b7132f26-d8eb-4047-9776-662fed73c3d9" name="IO">
+      <file relativepath="IO\IO.dlsche"/>
+    </filefolder>
+    <filefolder id="e4bebda5-d880-4038-848d-c702125cd6ad" name="8086">
+      <file relativepath="8086\8086.dlsche"/>
+      <file relativepath="8086\8086.pdf"/>
+      <file relativepath="8086\ALU.dlsche"/>
+      <file relativepath="8086\BRANCH.dlsche"/>
+      <file relativepath="8086\CU.dlsche"/>
+      <file relativepath="8086\FLAG.dlsche"/>
+      <file relativepath="8086\PC.dlsche"/>
+      <file relativepath="8086\README.md"/>
+      <file relativepath="8086\REGS.dlsche"/>
+      <file relativepath="8086\rom.bat"/>
+      <file relativepath="8086\rom.masm"/>
+      <file relativepath="8086\rom.rxm"/>
+      <file relativepath="8086\uPC_NEXT.dlsche"/>
+    </filefolder>
+    <file relativepath="README.md"/>
+    <file relativepath="top.dlsche"/>
+  </files>
+
+</project>
--- a/MEM/MEM.dlsche
+++ b/MEM/MEM.dlsche
--- a/MEM/MEM.dlsche.svg
+++ b/MEM/MEM.dlsche.svg
--- a/MEM/dmasm.c
+++ b/MEM/dmasm.c
--- a/MEM/dmasm.exe
+++ b/MEM/dmasm.exe
--- a/MEM/ram.asm
+++ b/MEM/ram.asm
+; 0~15号存储单元存放中断向量，即中断向量表
+.int_table
+
+; 代码段 .text 总是从位置 0x10 开始
+.text 
+mov al, 16
+add al, num
+
+; 死循环
+end:
+jmp end
+
+; 数据段
+.data
+num: -1
+
+
+
--- a/MEM/ram.bat
+++ b/MEM/ram.bat
+@echo off
+dmasm.exe ram.asm -o ram.rxm -l ram.lst -g ram.dbg
+pause
--- a/MEM/ram.dbg
+++ b/MEM/ram.dbg
--- a/MEM/ram.dlsche
+++ b/MEM/ram.dlsche
--- a/MEM/ram.dlsche.svg
+++ b/MEM/ram.dlsche.svg
--- a/MEM/ram.lst
+++ b/MEM/ram.lst
+0001                     ; 0~15号存储单元存放中断向量，即中断向量表
+0002                     .int_table
+0003                     
+0004                     ; 代码段 .text 总是从位置 0x10 开始
+0005                     .text 
+0006    10    01 00 10   mov al, 16
+0007    13    0C 00 18   add al, num
+0008                     
+0009                     ; 死循环
+0010                     end:
+0011    16    57 16      jmp end
+0012                     
+0013                     ; 数据段
+0014                     .data
+0015    18    FF         num: -1
+0016                     
+0017                     
+0018                     
--- a/MEM/ram.rxm
+++ b/MEM/ram.rxm
--- a/README.md
+++ b/README.md
+# 说明
+8086微机系统实验环境的使用
+# 原理图
+![raw svg](top.dlsche.svg)
\ No newline at end of file
--- a/top.dlsche
+++ b/top.dlsche
--- a/top.dlsche.svg
+++ b/top.dlsche.svg