consistency.

5c596bb3 · kaashoek · 5cb7877e · 5c596bb3 · 5c596bb3
--- a/ioapic.c
+++ b/ioapic.c
@@ -37,30 +37,31 @@ ioapic_init(void)
  uchar id;
  int i;
-  if (ismp) {
+  if (!ismp)
-    io = (struct ioapic*) IO_APIC_BASE;
+    return;
-    l = ioapic_read(io, IOAPIC_VER);
-    nintr =  ((l & IOART_VER_MAXREDIR) >> MAXREDIRSHIFT) + 1;
+  io = (struct ioapic*) IO_APIC_BASE;
-    id = ioapic_read(io, IOAPIC_ID) >> APIC_ID_SHIFT;
+  l = ioapic_read(io, IOAPIC_VER);
-    if(id != ioapic_id)
+  nintr =  ((l & IOART_VER_MAXREDIR) >> MAXREDIRSHIFT) + 1;
-      cprintf("ioapic_init: id isn't equal to ioapic_id; not a MP\n");
+  id = ioapic_read(io, IOAPIC_ID) >> APIC_ID_SHIFT;
-    for(i = 0; i < nintr; i++) {
+  if(id != ioapic_id)
-      // active-hi and edge-triggered for ISA interrupts
+    cprintf("ioapic_init: id isn't equal to ioapic_id; not a MP\n");
-      // Assume that pin 0 on the first I/O APIC is an ExtINT pin.
+  for(i = 0; i < nintr; i++) {
-      // Assume that pins 1-15 are ISA interrupts
+    // active-hi and edge-triggered for ISA interrupts
-      l = ioapic_read(io, IOAPIC_REDTBL_LO(i));
+    // Assume that pin 0 on the first I/O APIC is an ExtINT pin.
-      l = l & ~IOART_INTMASK;  // allow INTs
+    // Assume that pins 1-15 are ISA interrupts
-      l |= IOART_INTMSET;
+    l = ioapic_read(io, IOAPIC_REDTBL_LO(i));
-      l = l & ~IOART_INTPOL;   // active hi
+    l = l & ~IOART_INTMASK;  // allow INTs
-      l = l & ~IOART_TRGRMOD;  // edgee triggered
+    l |= IOART_INTMSET;
-      l = l & ~IOART_DELMOD;   // fixed
+    l = l & ~IOART_INTPOL;   // active hi
-      l = l & ~IOART_DESTMOD;  // physical mode
+    l = l & ~IOART_TRGRMOD;  // edgee triggered
-      l = l | (IRQ_OFFSET + i); // vector
+    l = l & ~IOART_DELMOD;   // fixed
-      ioapic_write(io, IOAPIC_REDTBL_LO(i), l);
+    l = l & ~IOART_DESTMOD;  // physical mode
-      h = ioapic_read(io, IOAPIC_REDTBL_HI(i));
+    l = l | (IRQ_OFFSET + i); // vector
-      h &= ~IOART_DEST;
+    ioapic_write(io, IOAPIC_REDTBL_LO(i), l);
-      ioapic_write(io, IOAPIC_REDTBL_HI(i), h);
+    h = ioapic_read(io, IOAPIC_REDTBL_HI(i));
-    }
+    h &= ~IOART_DEST;
+    ioapic_write(io, IOAPIC_REDTBL_HI(i), h);
  }
 }
@@ -70,14 +71,15 @@ ioapic_enable (int irq, int cpunum)
  uint l, h;
  struct ioapic *io;
-  if (ismp) {
+  if (!ismp)
-    io = (struct ioapic*) IO_APIC_BASE;
+    return;
-    l = ioapic_read(io, IOAPIC_REDTBL_LO(irq));
-    l = l & ~IOART_INTMASK;  // allow INTs
+  io = (struct ioapic*) IO_APIC_BASE;
-    ioapic_write(io, IOAPIC_REDTBL_LO(irq), l);
+  l = ioapic_read(io, IOAPIC_REDTBL_LO(irq));
-    h = ioapic_read(io, IOAPIC_REDTBL_HI(irq));
+  l = l & ~IOART_INTMASK;  // allow INTs
-    h &= ~IOART_DEST;
+  ioapic_write(io, IOAPIC_REDTBL_LO(irq), l);
-    h |= (cpunum << APIC_ID_SHIFT);
+  h = ioapic_read(io, IOAPIC_REDTBL_HI(irq));
-    ioapic_write(io, IOAPIC_REDTBL_HI(irq), h);
+  h &= ~IOART_DEST;
-  }
+  h |= (cpunum << APIC_ID_SHIFT);
+  ioapic_write(io, IOAPIC_REDTBL_HI(irq), h);
 }
--- a/lapic.c
+++ b/lapic.c
@@ -105,13 +105,14 @@ lapic_write(int r, int data)
 void
 lapic_timerinit(void)
 {
-  if (lapicaddr) {
+  if (!lapicaddr) 
-    lapic_write(LAPIC_TDCR, LAPIC_X1);
+    return;
-    lapic_write(LAPIC_TIMER, LAPIC_CLKIN | LAPIC_PERIODIC |
-		(IRQ_OFFSET + IRQ_TIMER));
+  lapic_write(LAPIC_TDCR, LAPIC_X1);
-    lapic_write(LAPIC_TCCR, 10000000);
+  lapic_write(LAPIC_TIMER, LAPIC_CLKIN | LAPIC_PERIODIC |
-    lapic_write(LAPIC_TICR, 10000000);
+	      (IRQ_OFFSET + IRQ_TIMER));
-  }
+  lapic_write(LAPIC_TCCR, 10000000);
+  lapic_write(LAPIC_TICR, 10000000);
 }
 void
@@ -126,7 +127,7 @@ lapic_init(int c)
 {
  uint r, lvt;
-  if (lapicaddr == 0) 
+  if (!lapicaddr) 
    return;
  lapic_write(LAPIC_DFR, 0xFFFFFFFF);    // Set dst format register